USB Device Interrupt Status
| FRAME | The frame interrupt occurs every 1 ms. This is used in isochronous packet transfers. |
| EP_FAST | Fast endpoint interrupt. If an Endpoint Interrupt Priority register (USBEpIntPri) bit is set, the corresponding endpoint interrupt will be routed to this bit. |
| EP_SLOW | Slow endpoints interrupt. If an Endpoint Interrupt Priority Register (USBEpIntPri) bit is not set, the corresponding endpoint interrupt will be routed to this bit. |
| DEV_STAT | Set when USB Bus reset, USB suspend change or Connect change event occurs. Refer to Section 13.12.6 Set Device Status (Command: 0xFE, Data: write 1 byte) on page 366. |
| CCEMPTY | The command code register (USBCmdCode) is empty (New command can be written). |
| CDFULL | Command data register (USBCmdData) is full (Data can be read now). |
| RxENDPKT | The current packet in the endpoint buffer is transferred to the CPU. |
| TxENDPKT | The number of data bytes transferred to the endpoint buffer equals the number of bytes programmed in the TxPacket length register (USBTxPLen). |
| EP_RLZED | Endpoints realized. Set when Realize Endpoint register (USBReEp) or MaxPacketSize register (USBMaxPSize) is updated and the corresponding operation is completed. |
| ERR_INT | Error Interrupt. Any bus error interrupt from the USB device. Refer to Section 13.12.9 Read Error Status (Command: 0xFB, Data: read 1 byte) on page 368 |
| RESERVED | Reserved. The value read from a reserved bit is not defined. |